1. Field of Invention
This patent relates generally to electronic circuitry and more specifically to analog to digital converters.
2. Discussion of Related Art
Analog to digital converters are used in many modern electronic systems. Many electrical signals are analog—meaning that the signal can take on any value in a range of values. However, many components in electronic systems operate on digital signals meaning that the value of the signal is represented at any time by “bits” of data, with each bit taking on only one of two possible states. Accordingly, there is a need for “analog to digital converters” to allow analog signals to be processed in digital form.
Many types of analog to digital converters are known. One type of analog to digital converter is called a “flash converter”. A flash converter has multiple reference levels and comparators. Each comparator compares the analog input signal to one of the reference levels and produces an output that indicates whether the input is above or below the reference level. These signals are digital because each signal is in only one of two possible states. The outputs of the comparators taken together provide a digital indication of the value of the analog input signal.
The digital representation of the signal in this form does not exactly represent the value of the analog input. From the digital bits, it can only be determined that the input signal falls in a range between the largest reference that was below the value of the input signal and the smallest reference value that was above the value of the input signal. However, if this range, or “band,” is small enough, the outputs of the comparators accurately represent the value of the input signal at any point in time.
The size of the “bands” is sometimes referred to as the “resolution” of the conversion. When the bands are very small, the conversion is said to have high resolution. The resolution that is acceptable depends on the specific application in which the analog to digital converter will be used.
One way to ensure that an analog to digital converter has sufficient resolution is to provide many reference signals that differ from each other by only a small amount. However, it is very difficult to make a single flash circuit with many reference levels and comparators. Accordingly, some analog to digital converters use a pipelined approach.
In a pipelined analog to digital converter, multiple stages are provided. Each stage accepts an analog input and produces digital bits representing the band in which the input signal falls. The stage also creates an analog output representing the difference between the digital representation of the signal and the actual analog signal. This difference is called the “residue.” The residue can be passed to the next stage in the pipeline.
Each successive stage in the “pipeline” produces more digital bits and another residue signal that can be passed on to further stages, if more bits are desired. As more bits are produced, the resolution of the representation of the analog signal is improved. Conversely, the residue representing the difference between the analog signal and the representation based on the digital signal gets smaller.
An advantage of a pipelined converter is that a flash converter with a relatively few number of comparators can be used at each stage to produce the digital bits.
Some prior art pipelined converters are called “multiplying converters.” Each stage in the pipeline multiplies the residue by a factor that is based on the increase in resolution provided by that stage. For example, if a stage produces enough bits to double the resolution of the converter, that stage will multiply the residue by two before passing it to the next stage. If a stage produces enough bits to quadruple the resolution, the residue signal is multiplied by four before it is passed to the next stage. The circuitry that computes and appropriately multiples the residue is sometimes referred to as a “multiplying digital to analog converter”, or MDAC.
An advantage of a multiplying converter is that it keeps the residue signal from getting very small. Because smaller signals are more susceptible to noise than larger signals, a multiplying converter is less susceptible to noise than a converter that attempts to represent a residue without scaling. A second advantage is that each stage in the pipeline can be made the same because the residue signal will always be scaled to fall in the same voltage range. Though the digital bits generated in successive stages in the pipeline represent smaller and smaller numbers, multiplying the residue to keep it in a particular range does not affect the output of the converter. Digital bits from each stage are combined by digital logic circuitry in a way that weights the bits representing larger signals more than the bits that represent smaller signals.
For a pipelined converter to work accurately, the flash converter and MDAC in each stage of the pipeline should operate on the same signal. To ensure this, prior pipelined converters had sample and hold circuitry. A sample and hold circuit is a circuit that receives an input signal during one interval of time, generally called the sample interval. During the hold interval, the circuit has at its output a value representative of the input at the beginning of the hold interval. A conventional way to implement a sample and hold circuit is to connect a capacitor to the input signal through a switch. During the hold interval, the capacitor is connected to the input signal. The capacitor charges to a value that is representative of the input signal. As the input signal changes, the charge on the capacitor changes in proportion to the input signal. To start the hold interval, the capacitor is disconnected from the input so that charge is trapped on the capacitor. Because the amount of charge is determined by the input signal at the start of the hold interval, the output of the sample and hold circuit holds a sample of the input value during the hold interval.
Some prior multiplying analog to digital converters used switched capacitor structures in both the flash and the MDAC portions of each stage. These circuits used the capacitors in the switched capacitor structures to implement the sample and hold function.
An example of a switched capacitor structure is found in U.S. Pat. No. 6,570,411 entitled Switched-Capacitor Structures with Reduced Distortion and Noise and Enhanced Isolation, which is hereby incorporated by reference.
A prior product, the AD9433 sold by Analog Devices, Inc., used an MDC with a bank of capacitors to both hold the input signal and to subtract the amount necessary to produce the residue signal. During the sample interval, the all of the capacitors in the bank are charged by the input signal. At the end of the sample interval, all of the capacitors are disconnected from the input signal, leaving each capacitor charged to a level that represents the input signal at the end of the sample interval. Then, one end of each of the capacitors is connected to the input of the amplifier.
Also after the sample interval, the other end of each of the capacitors is switched to a reference voltage level. In the AD9433, each capacitor is switched to one of two reference levels—a high voltage reference or a low voltage reference. Connections to the reference levels introduce an offset at the input of the amplifier, with the amount of the offset being dependent on the relative number of capacitors connected to the high reference and to the low reference.
The relative number of capacitors connected to the high and low references is selected based on the output of the flash. In this way, the input to the amplifier is offset by an amount proportional to the output of the flash—which is what is required to create the residue signal.
In this device, all of the capacitors are nominally the same size. Accordingly, it should not matter which capacitors are connected to which reference level. However, it is not possible in practice to make all of the capacitors the same size. Differences in capacitors will lead to a small error in forming the residue signal. If the same group of capacitors is connected in the same way each time the flash output takes on a certain value, there will be a non-random error introduced in the residue signal. Such an error is termed “distortion.”
To avoid distortion, the AD94333 used “capacitor shuffling”—meaning that, even though the total number of capacitors connected to each reference was still determined by the output of the flash, the specific capacitors connected to each reference was randomly selected. Randomly selecting the capacitors made the error introduced by the capacitors random. Random noise is usually referred to as “noise.”
For some applications of analog to digital converters the allowable distortion is much lower than the allowable noise. Thus, even though capacitor shuffling introduces noise, the benefits of reducing distortion outweigh the harmful effects of introducing noise.
An example of such an application is a cellular telephone system. FIG. 1 shows a cellular telephone system 120. Such a cellular telephone system would have a plurality of cells. For simplicity, one cell is illustrated.
The cell contains a base station 122. Each base station has a number of receivers 124A . . . 124C. Each of the receivers is connected to an antenna 126. The antenna receives signals from cellular telephones 130A . . . 130D. The receivers convert the received signals into separate voice signals. Circuitry inside base station 122 connects the signal from each cellular telephone through the telephone network 128 to an intended recipient (not shown).
Signals received from cellular telephones contain information representing a telephone conversation modulated onto an analog carrier. Because base station 122 performs switching in digital form, the receivers must demodulate the information representing each telephone call and present it in digital form. To do this process in
As is shown, there are more cellular telephones 130A . . . 30D than there are receivers. Each receiver can receive signals from more than one cellular phone simultaneously. A limiting factor in the design of a cellular base station is often the ability of the analog to digital converter to quickly and without distortion perform an analog to digital conversion. For example, better analog to digital converters will result in cellular base stations that can process calls from more cellular telephones.
Accordingly, it would be desirable to have an improved analog to digital converter.